OrCAD Tutorial Entering the Schematic using a local CIS Database

Entering the Schematic using a local CIS Database

Note that some level of administrative control over the machine will be required to configure the local CIS database.

Also note that a default installation of the products is assumed for this tutorial. If libraries have already been configured, the settings will need to be saved for the tutorial and restored after completing this tutorial.

Configure the Data Source for the local CIS database

In Windows, get to the Control Panel, Administrative Tools, ODBC Data Sources (64-bit), or use the Windows Search, type ODBC and select ODBC Data Sources (64-bit). In the ODBC Data Source Administrator (64-bit) select the System DSN tab and left-click>Add. Select the SQLite3 ODBC Driver and left-click>Finish.

To use the provided DBC file, set the Data Source Name to HeadphoneDB, use the Browse button for Database Name to select the saved HeadphoneDB.db file in the downloaded data, left-click>No WCHAR and left-click>OK.

Configure Capture CIS to use the local Database

Start Capture CIS 24.1 from the Cadence OrCAD X and Allegro X 24.1 Windows Start Menu group using a license that will enable the CIS functionality. Open “any” Capture DSN file to enable all the Options menu. Use Options>CIS Configuration and then use Browse to select the saved HeadphoneDB.DBC file from the downloaded data.

(If the ODBC data source was given a different name from the default, use New to select that ODBC Data Source and use the wizard to build the DBC file)

Starting the Project

Begin by starting OrCAD Capture CIS 24.1 using a license that enables the CIS functionality. If prompted, log into Cadence using your Cadence Support credentials, or OK the license message if you don’t have any cloud access enabled. Then, in the opened Capture application, use File>New Project to start a New Project, name the project Headphone, for example. Check the Enable PSpice Simulation if the design is to be simulated with PSpice, leave this unchecked if there isn’t a PSpice license available. Specify a folder for the project location. The Use Workspace is optional but will fix the project folder.

If Enable PSpice Simulation was checked, base the new project on the empty.opj existing project when prompted for a project template. If prompted, confirm the PSpice license to be used for this session.

Adding the Library for the CIS database

Start by adding the Libraries. Left-click on the "+" for "headphone.dsn" and then the "+" for "SCHEMATIC1", double-click on the Page1 entry to open the Schematic Page.

Left-click in the Schematic Page to activate it and then use Place>Part from the menu.

In the Place Part form at the right, left-click the Add Library icon to open a browser for the required libraries.

When the file browser opens, navigate to the saved HeadphoneAmp.olb file from the downloaded data, select it and left-click>Open to add the library.

Placing the parts

Use the completed schematic above for reference as you enter the schematic. The exact layout of the schematic is not critical to having a working example but correctly connecting the various elements will be required to get the circuit to work as expected. Once the libraries have been added, use Place>Component

In the Component Explorer, left-click on CIS ODBC to open the CIS Explorer.

Left-click the “+” to the left of HeadphoneDB (or what the ODBC Data Source was named), left-click the “+” to the left of HeadphoneParts, left-click the “+” to the left of Resistor, left-click the “+” to the left of SMD and left-click on Variable.

Left-click on the entry in the lower pane for the 10-910-001 Part Number entry. The background colour for the row will change to green. A graphic for the Schematic Part will be shown at the upper right, to see the graphic for the PCB Footprint, follow the steps in this note to add the PCB Footprint files to Capture.

Left-click on the Schematic1: Page 1 tab at the top to activate the Schematic Page, then left-click on the CIS Explorer – Place Database Part tab at the top. Right-click on the green row and take Place Database Part, or double-click on the green row, the Schematic Page activates with the “POT” attached to the cursor.

Use right-click>Rotate, or press the R key on the keyboard, to rotate the POT so that the "Resistor section" is vertical with the wiper pin to the right, or left, of that, then left-click the mouse to place the POT part towards the upper left of the page, right-click>End Mode, or use the Esc key, to end placing.

Note that which "end" of the POT that the wiper is connected to will not be critical, PSpice will be used to simulate the circuit bias to evaluate the required set point for the POT.

If required, left-click on the SET=0.5 text and drag the mouse to move this text away from the POT pin so that any added wires do not obscure the text.

Use File>Save from the menu to save the current schematic.

Return to the CIS Explorer – Place Database Part tab. Since the database has content restricted to this project, use the Query, rather than Explore, tab at the top left, use the drop-downs and set Property to Value, Compare to Equals (=) and Value to 22k and press Enter.

Select the part in the row and either right-click>Place Database Part or double-click the row to activate the Schematic Page. Use a left-click to place the part. Press Esc to end placement and, if required, rotate the resistor and drop onto the lower Pin of the POT previously placed. (Rearrange any Text as required)

Repeat these steps for 100k, 120k and 220 Resistors to complete the input bias chain, drop the resistor pins together. Once the resistors are placed, drag the resistors apart to get wires added.

Use File>Save from the menu to save the current schematic.

Don't be too concerned about the exact placement of the components at this stage, their positions can be changed as the circuit is completed.

Next place the three capacitors, C1, 47u, C2 0.47u and C3, 47u. For the 47u capacitors, use the 10-120-020 Part Number. (Note that, as far as PSpice is concerned, capacitors are not polarised, regardless of value. Although the actual circuit components probably will be polarised for the larger values)

Once the Capacitors are placed, use Place>Wire from the menu, or the W key, to enter wiring mode and make the initial connections, as shown, left-click on a Pin to start the wire, move the mouse to draw the wire, left-click to add any corners to the wire and left-click on the destination pin to complete the connection(s), right-click>End Mode, or use the Esc key, to end wiring mode. (Note that the right-hand half of the image has the wires attached to the capacitors.)

Use File>Save from the menu to save the current schematic.

Now continue to place and wire the next stage of the schematic. When placing the BC857 PNP transistor, use right-click>>Mirror Vertically while the part is on the cursor to get the emitter at the top of the part. The BC847 and BC857 are used for the small signal transistors.

Now continue with the schematic, working towards the right, use the "Mirror Vertically" option when placing the PNP transistors to get the Emitter towards the "top", or "bottom", as required. Also add the connection for the wiper of the POT component and the TIP41 and TIP42 transistors and associated resistors passive components. Use the 90-100-020 Part Number for the three connectors.

Use File>Save from the menu to save the current schematic.

So far, all the wires have default, system assigned, names, these will be formatted as "N" followed by an identifying number. Whilst these names will work perfectly as far as the design is concerned, it will be much easier to identify key net names if the default net names are overridden with Net Aliases. From the menu, Place>Net Alias, or press the N key, this form will open:

Then type in the required Net Alias name to assign in the Alias field, the value needs to be MID in this case and left-click>OK. The Net Alias value will be attached to the cursor and can be applied to a net by clicking on the net to "stick" the Net Alias to it.

(Some things to note about placing Net Aliases: IF the Net Alias ends in a number, the number will be automatically incremented, so a value of A0 will become A1 and so on, it is not possible to disable this; The Net Alias value will remain on the cursor so that it can be assigned to other wires, note that nets of the same name on the same schematic page will automatically be connected by the netlister so don't "accidentally" apply the same Net Alias to nets that you do not intend to have connected.)

If not simulating the circuit, either move to the Physical Layout with OrCAD X Presto section. Or move on to the Physical Layout with OrCAD X PCB Editor section.

If simulating the circuit, complete the schematic as shown below. Use Place>Component and, in the Component Explorer, left-click on PSpice, use the Search at the top and type VSIN in the Search box, double-click the VSIN result and place the VSIN part in the Schematic as V1. Double-click the placed part and set the properties: VOFF to 0, VAMPL to 10m, FREQ to 1k and AC to 1; for information: this will provide a 10mV sine source at 1kHz for Transient Simulations and a 1V source for AC Sweep simulations, which are covered later. Go back to Place>Component and the PSpice parts, search for VDC and place a VDC part in the Schematic, referenced V2, for the power supply, double-click the displayed value and change 0Vdc to 20 for this circuit, PSpice will "know" that the value is a DC voltage, so it is not necessary to specify V, or Vdc, with the value. Use Place>Ground from the menu to place the 0 symbol required for the PSpice reference, this is from the Capsym library. Then use Place>Net Alias again to assign the IN, OUT and VPP Nets Aliases to the wires as shown. When placing the Net Aliases, control+E can be used to change the name on the cursor, rather than using the Place>Net Alias menu / icon three times.

Add the library for the simulation models to the configuration.

PSpice>Edit Simulation Profile, left-click>Configuration Files at the left and then left-click>Library. Left-click the upper Browse button and browse to the Library\PspiceMiscLib folder in the downloaded data and select the HeadphonePSpice.lib file. Double-click, or left-click>Open, to return to the PSpice Simulation Settings pane, left-click>Add to Design and left-click>OK.

The 300 Ohm load resistor, R17, needs to be ignored by the netlist. This part has only been added to aid in the PSpice simulation and is not required for the actual design, the load will be the "headphones". Double-click the R17 part in the schematic page, then left-click on New Property and add a new property Name of PSpiceOnly with a Value of TRUE. Left-click>OK to add the property and accept any other messages.

Use File>Save from the menu to save the current schematic.

Now that the schematic has been completed, move on to the next section to look at simulating the design. Note that the schematic must be completed before moving onto the Simulating the headphone circuit with PSpice section.